In fabricating semiconductor components, it is sometimes necessary to provide interconnects that transmit signals from the circuit side of a semiconductor substrate to the back side of the semiconductor substrate. Interconnects which extend through the semiconductor substrate from the circuit side to the back side are sometimes referred to as “through interconnects”. During fabrication of semiconductor substrates at the wafer level through interconnects are sometimes referred to as “through wafer interconnects” (TWI).
Typically through interconnects comprise metal filled vias formed in the semiconductor substrate, that are configured to electrically connect the integrated circuits on the circuit side to electrical elements on the back side of the semiconductor substrate. For example, the back side of the semiconductor substrate can include redistribution conductors and terminal contacts in electrical communication with the through interconnects. The metal in through interconnects typically comprises a highly conductive metal, such as copper or solder, formed as a plug that completely fills a via. In addition, a deposition process, such as screen printing, deposition through a nozzle, or capillary injection can be used to deposit the metal into the via to form the plug.
As semiconductor components become smaller and have higher input/output configurations, semiconductor manufacturers must fabricate through interconnects with increasingly smaller sizes and pitches, but without compromising performance. With regard to performance, through interconnects having a high electrical conductivity and a low parasitic capacitance provide the best performance. Conventional metal filled through interconnects do not have optimal performance characteristics, particularly at elevated temperatures.
In addition to having good performance characteristics, it is advantageous for through interconnects to be capable of fabrication at the wafer level using equipment and techniques that are known in the art. It is also advantageous to incorporate as few steps as possible in the fabrication process in order to minimize cost and defects. Conventional metal filled through interconnects require at least two photopatterning steps, and both front side (circuit side) and back side processing. For example, back side conductors and pads for terminal contacts, which are in electrical communication with the metal filled through interconnects, are made separately, and require additional photo patterning and fabrication steps. The requirement of multiple photo patterning and fabrication steps, and both front side and back side processing, can be very costly.
Another consideration in the fabrication of semiconductor components with through interconnects is the fragility of the integrated circuits contained on the semiconductor substrates. During wafer processing these integrated circuits, as well as other elements contained on the semiconductor substrates, must be protected from damage. Radiation sensitive integrated circuits contained on imaging semiconductor substrates, such as image sensor dice, are particularly vulnerable to damage during fabrication of through interconnects and back side conductors. Further, the semiconductor industry is moving towards chip scale packages that utilize thinned semiconductor substrates. It would be advantageous for a fabrication method for semiconductor components with through interconnects to be capable of handling thinned semiconductor substrates.
The method to be hereinafter described is directed to a wafer level fabrication method for semiconductor components with through interconnects, which addresses the above noted considerations. In addition, improved semiconductor components with through interconnects, and improved systems containing the semiconductor components will be hereinafter described.